{
  "schema": "rb-video-manifest/v1",
  "id": "6ae8b38fb1f5bb3ebcd06f5f",
  "canonical_url": "https://reelsbuilder.ai/video/6ae8b38fb1f5bb3ebcd06f5f",
  "created_at": "2026-11-02T16:00:15.004Z",
  "updated_at": "2026-11-02T16:05:36.264Z",
  "title": "AI Just Transformed Chip Design Forever",
  "description": "From RTL generation to verification closure, AI is cutting design cycles by 50x while slashing debug time by 40%. Here's how semiconductor engineers are shipping better chips, faster.",
  "type": "clip",
  "language": "en",
  "duration_sec": 59.09,
  "media": {
    "video_url": "https://cdn.reelsbuilder.ai/695bf1d30ee20b7d0f76da2d/files/6cbeaf9b45340f8a78d5e2dd34adec4e.mp4",
    "thumbnail_url": "https://cdn.reelsbuilder.ai/695bf1d30ee20b7d0f76da2d/files/156ffa62abeafbf9334378153963eb93_fresh_loud-44ea92a9c6.jpg",
    "transcript_url": "https://reelsbuilder.ai/video/6ae8b38fb1f5bb3ebcd06f5f/transcript.txt",
    "transcript": "Um, I think AI is moving from being just a productivity assistant to really being embedded in the semiconductor design flows now, right? \n\nSo we have all the way from generating RTL, iterating, um, generating test benches, improving verification, doing all those loops over and over again, and then really converging on designs much quicker. \n\nSo giving the engineers many more alternatives to review and then converging on design closure much, much quicker, right? \n\nSo one of the examples we've seen is like 50x faster RTL to verification closer times. And then we've also seen 40% less debug times, right? So we're starting to see a lot of these things come down significantly with higher coverage and better design alternatives. \n\nSo we're seeing seeing improvement in a lot of that. We're also seeing a lot of like power integrity violations coming down because of AI. \n\nSo it's really starting to show up kind of in the end-to-end flow.",
    "transcript_source": "script",
    "transcript_word_count": 158
  },
  "generation": {
    "model": null,
    "voice": null,
    "clip_type": null,
    "prompt_excerpt": null
  },
  "ai_context": {
    "summary": "From RTL generation to verification closure, AI is cutting design cycles by 50x while slashing debug time by 40%. Here's how semiconductor engineers are shipping better chips, faster.",
    "topics": [
      "YouTube Clip"
    ],
    "source_links": [
      {
        "label": "How AI is Revolutionizing Semiconductor Chip Engineering",
        "url": "https://www.youtube.com/watch?v=eLWJcgpoanc",
        "source": null
      }
    ],
    "publish_links": []
  },
  "publish": [],
  "performance": null,
  "creator": {
    "handle": null,
    "name": "Alec Furrier",
    "url": null,
    "consent": "public-attribution"
  },
  "license": "view-only",
  "provenance": {
    "c2pa_credential_url": null
  }
}